The present invention generally relates to semiconductor devices and more particularly to a fabrication process of an SOI (semiconductor-on-insulator) device, wherein a buried layer of reduced resistivity is provided.
The bipolar transistors generally have a buried collector layer of increased impurity concentration level under the collector layer to reduce the collector resistance. When constructing such a bipolar transistor on a semiconductor layer formed on an insulating substrate, one encounters a difficulty in forming such a buried collector contact layer.
FIGS. 1(A)-1(C) show a conventional process for forming such a buried low-resistivity layer in the SOI device.
Referring to FIG. 1(A), a silicon oxide layer 12 is formed to cover a support substrate 11 of silicon, for example, and a tungsten layer 13 is deposited on the upper major surface of the silicon oxide layer 12. Further, a silicon single crystal layer 14 is placed on the upper major surface of the tungsten layer 13 as shown in FIG. 1(B), and the structure of FIG. 1(B) is held at a temperature that causes a reaction between the silicon layer 14 and the tungsten layer 13. Typically, the structure of FIG. 1(B) is held at about 1100.degree. C. As a result of the reaction, a silicide layer 15 is formed under the silicon layer 14. This silicide layer 15 has a low resistivity and is used for the buried low-resistivity layer of the active devices formed on the semiconductor layer 14.
In this conventional process, there exists a problem in that a stress tends to develop at an interface between the silicide layer 15 and the silicon oxide layer 12 particularly when the control of the temperature for reacting the tungsten layer 13 and the silicon layer 14 is poor or when the duration of the reaction is longer than an optimum duration. Thereby, there is a substantial risk that the silicide layer 15 and the silicon oxide layer 12 will separate from each other. When this occurs, the yield of the device is inevitably decreased.